From jws@apollo.cs.uga.edu Mon Aug 25 14:27 EDT 2003
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CSCI 6720 -- Fall Semester 2003 (Syllabus, incomplete)

INSTRUCTOR:  Jeffrey W Smith (jws@cs.uga.edu)
OFFICE:      416 GSRC
OFFICE HOURS: TBA
GRAD ASST:   TBA

TEXT: Computer Architecture: A Quantitative Approach, 3e
        Hennessey and Patterson, 2003
 
TENTATIVE COURSE SCHEDULE (Guideline only, incomplete):

Week/material covered

1,2,3
    Combinational logic, ALU design
    Chap 1: Fundamentals of Computer Design (86p)
    App. H: Computer Arithmetic (74p)

4,X1,5
    Sequential logic, datapath. sequencer
    Chap 2: Instruction Set Principles and Examples (80p)
    App. C: Survey of RISC Processors (44p)

Sep 16 (Tue) -------------- EXAM 1 ---------------------

6,7
    App. A: Pipelining: Basic and Intermediate Concepts
    Chap 3: ILP and Dynamic Exploitation (89p)

8,9,X2
    Chap 5: Memory-Hierarchy Design (103p)

Oct 28 (Tue) -------------- EXAM 2 ---------------------

10,11,12
    Chap 7: Storage Systems (72p)
    App. D: An Alternative to RISC: the Intel 80x86 (23p)
    Other architectures: EDSAC, M6800, S/360 (App. F), SPARC

13,14,15
    Chap 8: Interconnection Networks (66p)
    App. I: Implementing Cache Coherence Protocols (12p)
    Other multiprocessors: SPARC, SGI
    * App. G: Vector Processors (43p)
    * Chap 4: Instruction-Level Parallelism w/ Software Approaches (86p)

Dec 16 (Tue) 8am ------------ FINAL EXAM ---------
 
GRADING:
(NOTE: Exams are comprehensive, but emphasize the most recent material.)

Hour exam 1 (Sep. 16)                   .15
Hour exam 2 (Oct. 28)                   .15
Final exam (8:00-11:00am, Tues Dec 16) 	.25

There will be some number of design/programming projects,
these may be weighted to reflect complexity.

Designs/Programs/problems assigned/labs .45